1. Field of the Invention
The present invention relates to a method of allocating a plurality of absolute address spaces for software and an apparatus for dynamically reconfiguring a main storage for a guest computer (hereinbelow simply referred to as "GUEST") in a virtual computer system.
2. Description of the Related Art
A uniform management of resources provided for a computer has a limit to increase users, so that a method has been created for dividing the resources into small groups and reconfiguring them (referred to as "a virtual machine system"). This method is adapted to enable a plurality of logical computers, that is, virtual machines (hereinbelow simply referred to as "VM") to simultaneously operate on a single real computer. With increasing utilization of such a system, kinds and number of the VMs to be operated may be changed in the daytime and at night. For such an operation, it is thought that a computer resource, for example, a main storage, occupied by a VM which uses it only in the daytime but not at night, be provided for another VM at night and returned to the original state in the next morning, thereby utilizing the resource more effectively. A system of dynamically reconfiguring a main storage of a VM as mentioned above is disclosed, for example, in "System of dynamically allocating a domain region in a VM" described in JP-A-64-17128.
In the system described in the above-mentioned JP-A-64-17128, the following four steps of processing are performed to dynamically reconfigure a main memory in a VM:
(a) a host computer (hereinbelow simply called "HOST") logically stops a CPU;
(b) the HOST stops input/output units;
(c) the HOST moves contents of a memory; and
(d) the HOST modifies contents of a register for checking the validity of an address value when the CPU is to access the memory and contents of a register for checking the validity of an address value when a channel is to access the memory. However, the above-mentioned JP-A-64-17128 does not describe any specific method for stopping input/output units as stated in step (b).
On the other hand, there has been proposed a system which provides a sequential region in a main memory disposed in a host real computer as a main storage for a VM (a resident VM system). In this type of VM, for accessing the main storage, an instruction processor adds an address displacement of the sequential region provided for the VM to a designated address to determine the address to be accessed in the main storage. Also, for executing a channel program created by an operating system (OS) of the VM, an input/output processor accesses channel command words (CCW) adding the address displacement to a designated address, and the channel program is executed while the address displacement is added to data addresses of the channel command words. Specifically explaining with reference to FIG. 14 (above the dashed line), when a resident VM is configured by allocating a capacity from the address 0 to .alpha. of a main storage provided for a real computer to virtual machine VM1, a capacity from the address next to .alpha. to .beta. to a virtual machine VM2, a capacity from the address next to .beta. to .gamma. to a virtual machine VM3, and a capacity from the address next to .gamma. to .delta. to a virtual machine VM4, a given address can be used as it is for accessing the virtual machine VM1 in the main memory. However, it is necessary to add an address displacement .alpha. to a given address for accessing the virtual machine VM2, an address displacement (.alpha.+.beta.) for accessing the virtual machine VM3, and an address displacement (.alpha.+.beta.+.gamma.) for accessing the virtual machine VM4.
A floating address register has conventionally been employed for establishing the correlation between an absolute address recognized by the OS and a corresponding physical address in the main storage. The floating address register is provided for every configuration unit of the main storage for storing a unit number (a physical substance) of the main storage corresponding to each configuration unit. By modifying the corresponding unit number of the main storage, different physical entities can be correlated to a single absolute address.
A related invention to the present invention has already been made and is referred to in JP-A-2-33639 the contents of which is incorporated herein by reference.